Transistors are formed by diffusing different dopants into silicon in specific patterns. Circuits are formed by connecting transistors to one another with wires. Integrated circuits are single pieces of silicon having many transistors with networks of aluminum or copper traces acting as wires to connect them. The transistors and wires are formed by laying down patterns of different substances, layer upon layer. The patterns are designed by engineers using sophisticated computer software and then transferred to glass plates. These plates are known as masks, or more appropriately, reticles. A light-sensitive resin called photoresist is spread on the surface of the wafer, and the image from the mask is focused on the photoresist using ultraviolet light. The light changes the photoresist so that portions of it can be washed away (sort of like developing photographic film), leaving the pattern from the mask duplicated on the wafer. The same pattern is repeated across the surface of the silicon wafer, as many times as it will fit.

The next step is to remove, deposit, or modify the areas of the surface not covered by the photoresist. There are a number of different techniques used to perform each type of operation, and each may use a number of hazardous chemicals. (The euphemism “clean room” refers only to the lack of particulates that could interfere with the formation of very tiny structures.) In this way, the transistors and wires of the integrated circuit are formed, layer by layer. The most sophisticated integrated circuits require dozens of masks costing thousands of dollars each, and forming each layer may involve a number of operations.

The primary process used to form transistors is called ion implantation or doping. Once the transistors are fabricated, the wires are formed by depositing metal strips in alternating orthogonal layers with a layer of connections, or “vias”, between each. Connections between the transistors and the lowest layer of wires are called contacts. To connect two contacts that are not along orthogonal lines would require using at least two wiring layers, much as one would navigate a city using a grid of north-south and east-west streets and avenues. The similarity is so close that a distance measured this way instead of directly is known as a “Manhattan distance.”

One of the reasons that semiconductor manufacturers seek to make chips smaller and smaller is that it costs the same amount of money to process a wafer, no matter how many individual chips fit on that wafer. A smaller chip (or die) means more dice per wafer. (One industry joke is that the mantra of the semiconductor manufacturer is “die per wafer, die per wafer, die per wafer.”) Any reduction in the size of each transistor, or increase in the size of each wafer, will require a large infrastructure investment which must be more than offset by the increased yield in terms of die per wafer.

After the wafer is finished, the individual dice, or chips, are tested, the wafer is sawed into individual chips, and the chips that pass the test are put into packages and tested again. It is these packages that you see when you look inside your cell phone or computer; they’re usually flat black rectangles with wires sticking out each side or on the bottom.

For each of these steps, there are companies that create the equipment. Just as car manufacturers rely on steel foundries and tire manufacturers and subcontractors to create all the parts that go into a car, chip makers like Intel and TI rely on companies like Applied Materials to create the machines they use, companies like Synopsys and Cadence to create the design software, companies like Credence and KLA Tencor to create the testers, and still other companies to supply the silicon wafers, masks, and the chemicals used to manufacture their chips.